Jeff Reeve | Principal Design Engineer | Patmos Engineering, Inc.
Jeff Reeve holds four patents in digital design and is considered an expert in his field. While Jeff is a Xilinx certified expert, he has worked on Altera, Actel(Microsemi), Lattice, ASIC and board designs. His experience includes:
FPGA/CPLD
- Architecture
- VHDL/Verilog RTL coding
- Testbench Generation and simulation
- Synthesis/Place & Route/Timing analysis
- 1M+ Gates, 300 MHz+
Microprocessors/Microcontroller/DSP
- Analog Devices SharcDSP 21161
- Coldfire
- ATMega128
- MicroChipPIC
- MipsFamily
Board Design
- Architecture
- Design and Schematic Capture
- PCB Layout/Fabrication/Assembly
- Test and Debug
- High Speed (2.5GHz+)
- Signal Integrity
- High Speed Memory Interfaces
- Power Supply design
System Interfaces
- PCI, USB, IEEE-1394 (FireWire)
- EIDE
- High Speed Custom Serial Interfaces